Optoelectronics pertains to the interaction of electronic processes with optical processes. This interaction is typically associated with energy conversion between electrical signals and optical signals. Optoelectronic devices, such as lasers, photodetectors, optical modulators, and optical switches, are examples of devices within which this interaction takes place.
Integration of optoelectronic/microwave modules has typically followed two paths, hybrid and monolithic. The hybrid integration connects discrete devices with electrical interconnects. Many individual devices are mounted separately on a carrier. Interconnections between the devices are typically accomplished through bond wires or metal paths formed on the carrier substrate. This approach has high flexibility since the devices are selected and interconnected according to the needs of a given application. However, this approach generally results in large circuit size and high parasitics relative to monolithic circuits. The advantage is that semiconductor materials and fabrication processes can be independently selected to enhance the performance of each device.
The hybrid approach is well suited for constructing prototypes. Production can be costly if the circuit contains many devices and interconnections. Additionally, the many separate devices must be tested and mounted individually.
Monolithic integration places all active and passive components on the same substrate. In addition to reducing the overall circuit size, this process reduces parasitic inductances and capacitances because it shortens the length of circuit interconnect structures. Monolithic circuits are typically formed with compound semiconductor families, for example, gallium aluminum arsenide (GaAlAs) and indium phosphide (InP), that inherently facilitate the realization of high resistivity substrates which reduce microwave losses and crosstalk in electrical interconnects.
The monolithic integration approach is particularly suited for high, volume applications. Since many circuit chips can be obtained from a single wafer and several wafers can be processed in a given fabrication run, the cost of a fabrication run is shared among the many units produced. However, each integrated circuit is designed for a specific purpose. Therefore, different applications must be served by designing and fabricating entirely new chips. The tooling cost associated with each new application is high and may not be justifiable when small volumes are needed.